Conventionally, a liquid crystal display device forms a display pattern on a screen by driving pixel electrodes disposed in matrix form. Specifically, voltage is applied across selected pixel elements and opposite electrodes opposing the selected pixel elements to optically modulate the liquid crystal layer inserted between these two kinds of electrodes, and the optical modulation is viewed as a display pattern.
A popular method for driving pixels is active matrix driving method according to which independently disposed electrodes are connected to, and driven by, respective switching elements. Examples of switching elements include thin film transistors (TFTs), metal-insulator-metal (MIM) elements, MOS transistor elements, and diodes.
FIG. 5 shows an example of conventional active matrix substrates using TFTs as switching elements. FIG. 5 shows a structure of a pixel segment of an active matrix substrate.
The active matrix substrate has on an insulating substrate 41 scanning lines 42 disposed parallel to one another and signal lines 43 disposed crossing over the scanning lines 42 at right angles. The substrate 41 will be later described in detail (see FIG. 6).
Pixel electrodes 44 are disposed in the rectangular regions bordered by the scanning lines 42 and the signal lines 43. TFTs 45 are formed in proximity to the cross points of the scanning lines 42 and the signal lines 43. In addition, between neighboring pairs of the scanning lines 42 beneath the pixel electrodes 44 are formed supplemental capacitance (Cs) lines 46 disposed parallel to the scanning lines 42. The Cs lines 46 are provided commonly to all the pixels. A supplemental capacitance is formed where the pixel electrode 44 overlaps the Cs line 46 with a gate insulating film 52 therebetween.
A brief overview of a manufacturing process of such an active matrix substrate is given below with reference to FIG. 6 which is a cross-sectional view taken along line 6--6 in FIG. 5. First, the scanning lines 42, the Cs lines 46, and gate electrodes 51 for TFTs 45 are formed on the substrate 41 in a single process. Next, the gate insulating film 52 is formed to cover all these, and a semiconductor layer 53, an etching stopper layer 54, and a contact layer 55 are formed in this order on the gate insulating film 52.
Finally, a transparent conductive film T and a metal thin film M are formed thereon and patterned, so as to form source electrodes 56, the signal lines 43, drain electrodes 57, and the pixel electrodes 44, which complete the manufacture of the active matrix substrate. The source electrode 56, the signal line 43, and the drain electrode 57 are composed of two layers, i.e. the transparent conductive film T and the metal thin film M, whereas the pixel electrode 44 is composed of a single layer, i.e. the transparent conductive film T.
When such an active matrix substrate is applied to a liquid crystal display device, the opening of the liquid crystal display element is the combined areas of the pixel electrodes 44 less the pasting accuracy of the opposite substrate (not shown) with a black matrix of opposite substrate. The light transmitivity of the liquid crystal display element largely depends on the aperture ratio, and is one of the factors that determine the display quality of the liquid crystal display element.
Hence, various methods have been proposed to increase the aperture ratio, one of which is the so-called Pixel on Passivation structure in which pixel electrodes are disposed on an interlayer insulating film covering TFTs as active elements and bus lines (scanning lines and signal lines).
FIG. 7 shows an example of an active matrix substrate of this structure. FIG. 7 shows a structure of a pixel segment of an active matrix substrate. FIG. 8 is a cross-sectional view taken along line 8--8 in FIG. 7. FIG. 9 is a cross-sectional view taken along line 9--9 in FIG. 7.
As shown in FIG. 7, the active matrix substrate includes on the insulating substrate 41 scanning lines 42, signal lines 43, and Cs lines 46 similarly to the active matrix substrate in FIG. 5. TFTs 45 are also formed in the same manner as described above (FIG. 8), and have the same layer structure.
The difference lies in that an interlayer insulating film 58 is formed so as to cover the substrate 41 on which the TFTs 45 are already formed and that the pixel electrodes 44 are formed on the interlayer insulating film 58. As the pixel electrode 44 is disposed on the interlayer insulating film 58, the edges of the pixel electrode 44 can be placed to overlapping the scanning lines 42 and the signal lines 43, increasing the area of the pixel electrode 44 and achieving a high aperture ratio.
As shown in FIGS. 7 and 9, the pixel electrode 44 is connected to the drain electrode 57 of the TFT 45 by the contact of the pixel electrode 44 to a supplemental capacitance electrode (Cs electrode) 61 via a through hole 62 in the interlayer insulating film 58 above the Cs line 46. The Cs electrode 61 is composed of a transparent conductive film T that is the lower layer of the drain electrode 57 of a double-layered structure, and connected to the drain electrode 57 via a connecting electrode 60 also composed of a transparent conductive film T. A supplemental capacitance is formed where the Cs electrode 61 overlaps the Cs line 46 provided to the lower layer with the gate insulating film 52 disposed between the Cs electrode 61 and the Cs line 46.
The Pixel on Passivation structure is disclosed, for example, by Japanese Laid-Open Patent Application No. 172685/1983 (Tokukaisho 58-172685). It is known that the structure improves the aperture ratio and restrains defective orientation of the liquid crystal by shielding the electric field generated by the signal lines.
However, a simple adoption of the Pixel on Passivation structure to the liquid crystal display element for better display quality brings the opposite result. The Pixel on Passivation structure generates a larger parasitic capacitance between the scanning line 42 and the pixel electrode 44 than does the conventional structure shown in FIG. 5, and consequently the pixel voltage applied to the pixel electrode 44 is affected by the source signal in the scanning line 42 and causes crosstalk, degrading the display quality.
A suggested method for a reduced parasitic capacitance is to use as the interlayer insulating film 58 an organic insulating film that has a relatively low dielectric constant and can be easily made into a thick film.
As the active matrix substrate has increasingly fine and delicate structure, a reduction in the ON resistance of the TFT 45 as a switching element is desired. A proposed solution to this is to use a fine crystal silicon (n.sup.+) film in place of a conventionally used amorphous silicon (n.sup.+) film as the contact layer 55 which is a doped semiconductor layer.
However, when a TFT 45, as the switching element, having a fine crystal silicon (n.sup.+) film as the contact layer 55 is used in combination with the interlayer insulating film 58 as the organic insulating film, an increase in OFF current is observed in an area where gate voltage is negative, especially in an area where a deep voltage not more than --10 V is applied, due to hole current between the grains of the fine crystal silicon (n.sup.+) film. Such an increase in OFF current limits the voltage at which the TFT 45 as a switching element can be driven, reduces the margin of threshold shift caused by aging, and offers less freedom in designing active matrix substrates.
In order to circumvent the reduction in OFF current, it has been suggested that an inorganic insulating film such as SiNx should be formed beneath the organic insulating film. This method, however, requires a process covering the formation of the inorganic insulating film to the photo-etching thereof, inevitably resulting in an increased number of processes. Consequently, another method with no additional process is desired.